VLSI

Set_data_check 

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set_data_check -0.05 \
  -fr [get_pins $related_pin] \
  -to [get_pins $constrained_pin]

set_multicycle_path -hold 1 \
  -to [get_pins $constrained_pin]

Above script constrains the skew between $related_pin and $constrained_pin no more than 0.1ns, where $related_pin is like a clock pin whereas $constrained_pin is like a data pin.

As neither -setup nor -hold specified, it implies that both setup and hold checks are set as -0.05ns.